ST CM3 ciplerde ART Accelerator

[z]

ST nin ART Accelerator unitesi hakkinda bilginiz varmi? Ne is yapar?

[muuzoo]

Aratınca şöyle bir açıklama buldum.

ST's proprietary 90nm process and the development of the ART Accelerator enable perfectly optimized processor-memory interactions with a performance equivalent to zero wait states, taking the performance of the Cortex-M3 core to its natural limits."

Block diagram of ST's proprietary Adaptive real-time memory (ART) Accelerator
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"The ART [adaptive real-time memory] Accelerator is a pre-fetch queue and branch cache mechanism that stores the first instructions and constants of the branches, interrupt and subroutine calls. The penalty occurs the first time those events occur like for any pipelining mechanism. After that, the instructions stored in cache are pushed immediately in the pre-fetch queue upon recognition of a stored branch address. In addition, the embedded Flash is organized in 128-bit rows, allowing up to 8 (16-bit) instructions to be read per access,"